Soviet vs US radar processors comparison

lancer21

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Been trying to find out more on this subject, but there seems to be frustratingly little. I'm interested in finding out data on 1970s-1980s soviet and american radar processors to form an idea about the oft-mentioned gap between the two in this domain. i'm not a computer man so anything detailed will fly over my head unfortunately, just the raw numbers are sufficient, such as RAM, ROM, operations per second, maybe weight etc. Having apple to apple comparisons would be really helpful.

So from what i gather the N-019 Ts100 prcessor has 8k RAM, 136k ROM and 170,000 operations per second, and weighs 32kg?
But how about the relevant figures for the N-001 and SBI-16s Argon-15A? For N-001 is it same as N-019 as from what i read they use the same processor?
I found some useful info here to start with:


Also, some info here on various soviet computers:


As to the US radars, APG-63 processor (what is it called, is it CP-1075 or something else?) seems to operate at 340,000 or 400,000 operations/sec. But what about RAM/ROM etc? I've seen figures like 16k, 24k, 96k but i'm confused which is which (seems 1000k refers to APG-70?). I've also seen 1,4 million operation per second listed, but not clear if for APG-63PSP or APG-70 (in connection with which 30 million operations per second is mentioned too).

For AWG-9, is the processor called CDC-5400B? From extrapolation based on some numbers for APG-71 (3,2 million operations/sec which is said to be 6 times more than AWG-9), it would be about 500,000 operations/second?
For APG-66, 800-900,000 operations/sec?
APG-65 at 7,2 million operations/sec?

Many thanks for any input.
 
Thanks for those, though the APG-63 stuff is way over my head (unless burried somewhere in the 400 pages is info on the processor speed/RAM etc?). And i can't see the Scribd file, am i mistaken in having seen that file freely available somewhere?
 
I remember tales about radar operators being able to discern aircraft from (what seems to me to be) featureless blobs.

Hook echos are he best I can discern...for severe weather.
 
Been trying to find out more on this subject, but there seems to be frustratingly little. I'm interested in finding out data on 1970s-1980s soviet and american radar processors to form an idea about the oft-mentioned gap between the two in this domain. i'm not a computer man so anything detailed will fly over my head unfortunately, just the raw numbers are sufficient, such as RAM, ROM, operations per second, maybe weight etc. Having apple to apple comparisons would be really helpful.
So from what i gather the N-019 Ts100 prcessor has 8k RAM, 136k ROM and 170,000 operations per second, and weighs 32kg?

To make things more complicated, some Russian technical book claims 800 000 ops per second on Ts100. :)
(See topic about Mig-29 avionics on this forum)
Not clear... Anyway... as you can see in Russian museum, the predecessor of C-100 (Ts100) Orbita-20 has performance of 200 ops/s in (register - register) and 100 000 ops : register - memory
Orbita-20 was used in late 70 tees design like Su-17M4 , and later. It was probably also used as subcomponent in display system for Su-27 and maybe for display system of Mig-29...

It predecessor Orbita -10 had performance 125 000 ops R-R and half of that in register-memory..

Thus C-100... well it is hardly believed that it had the same performance as Orbita-20...

For C-100 there is mentioned only "200.000" or "170000 but with no discrimination between R-R or R-M...
And for C-100 there was introduced some complex , application dependent instruction set (with 40 bit command length?) called POISK...
So ... it is possible that its performance was "170 000" but complex one and with one operand in memory... not the same as the previous one ...

Here you have some summary of computers for aircraft avionics,,..
https://www.computer-museum.ru/histussr/stpc.htm

BTW : in this museum there is section in English and Russian. In Russian there are more articles.
And this refers also to corresponding Russian versions of articles that have version in English ... so check both versions...


But how about the relevant figures for the N-001 and SBI-16s Argon-15A? For N-001 is it same as N-019 as from what i read they use the same processor?
I found some useful info here to start with:


Also, some info here on various soviet computers:
I think - the above link about will explain a lot...
According to N-001 it uses C-100 series computer, (the same as Mig-29, ... there are some subtle differences that Su use version with slightly different version like Mig C100.02 and Su C100.06 - changes may lies in memory?)

SBI-16 use Argon-15K with performance quoted as 500.000 ops per second ( ... Argon-15A had 200.000)


As to the US radars, APG-63 processor (what is it called, is it CP-1075 or something else?) seems to operate at 340,000 or 400,000 operations/sec. But what about RAM/ROM etc? I've seen figures like 16k, 24k, 96k but i'm confused which is which (seems 1000k refers to APG-70?). I've also seen 1,4 million operation per second listed, but not clear if for APG-63PSP or APG-70 (in connection with which 30 million operations per second is mentioned too).

For AWG-9, is the processor called CDC-5400B? From extrapolation based on some numbers for APG-71 (3,2 million operations/sec which is said to be 6 times more than AWG-9), it would be about 500,000 operations/second?
Data about AWG seems to be possible, especially taking in account the year of development ...

For APG-66, 800-900,000 operations/sec?
APG-65 at 7,2 million operations/sec?
According to APG-65... well this refers to its DSP ...
7.2 is not much for DSP ... so maybe this refers to operation on complex numbers (that is for multiplication: 4 multiplications and 2 addtition).. BTW I think APG-65 and -63PSP are very similar in this manner...
and those are there is a lot said about APG-65 in another topic of this forum (technical documentation about its soft/ hardware..)
Many thanks for any input.

There was said a lot on this forum. I suggest to seek for a while..
 
Many thanks for your input LukaszK. I think i linked to the computer museum page earlier, but probably missed the page you showed above, very interesting details, would need to translate and save all that.

Like i said i'm not terribly versed into this computer stuff, but regarding the Ts100, from my understanding the Ts100 was lighter and cheaper than the Orbita series and at roughly comparable performance, hence it was seen as an advance and adopted widely.
 
The Soviet Union fell behind on the technology of shrinking componentry. Smaller components use less power, generate less heat and can run faster.

For a whole, they were able to keep up acceptable performance with acceptance of heavier devices made with older processes and clever hardware and software tweaks, but they fell off the performance curve even when accepting heavier components.

WIth regard to 'radar processors', you have to draw a firm distinction between data processors and signal processors and analogue versus digital. Also be careful of comparing raw numbers - you may be comparing oranges to bananas.
 
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Many thanks for your input LukaszK. I think i linked to the computer museum page earlier, but probably missed the page you showed above, very interesting details, would need to translate and save all that.

Like i said i'm not terribly versed into this computer stuff, but regarding the Ts100, from my understanding the Ts100 was lighter and cheaper than the Orbita series and at roughly comparable performance, hence it was seen as an advance and adopted widely.
Lighter, cheaper, more reliable.
 
As to the US radars, APG-63 processor (what is it called, is it CP-1075 or something else?) seems to operate at 340,000 or 400,000 operations/sec. But what about RAM/ROM etc? I've seen figures like 16k, 24k, 96k but i'm confused which is which (seems 1000k refers to APG-70?). I've also seen 1,4 million operation per second listed, but not clear if for APG-63PSP or APG-70 (in connection with which 30 million operations per second is mentioned too).

IBM CP-1075 Central Computer
24K on initial F-15A, 96K in later upgrades. Used core memory. Replaced by CP-1075C in 1992 (using VHSIC). Does it actually do radar data processing?

AN/APG-63 initially used a hardware digital signal processor but the PSP replaced it with a programmable digital signal processor.
 
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The F-15 Central Computer (CC), designated the CP-1075/AYK. uses the IBM AP-1 computer. It is a high speed, stored program, binary, fractional, two's complement, general purpose digital computer specifically designed ta meet the real time requirements of the high performance F-15 Air Superiority aircraft.

The CC has successfully completed formal Qualification Testing to Mil Standard 810B and Reliability Testing to Mil Standard 7818. It has proven itself flightworthy in over four thousand hours of successful flight testing at Edwards and Luke Air Force Bases.

The computer consists of three major functional sections:
o Central Processing Unit
o Memory
o Input/output

These functional sections are implemented by means of 12 plug-in modules and a single plug-in modular power supply contained in one Line Replaceable Unit(LRU) weighing about 40 lbs and occupying less than0.9 cu ft.

Table 11 summarizes the salient functional and physical features of the computer. The Central Processing Unit (CPU) is a high executing between 300,000 and 400,000 operations per second depending on the instruction mix. It executes and sequences instructions, processes interrupts, initiates input / output operations and performs the arithmetic and logical operations. The CPU has many functional similarities to the IBM System/360 computer. The Similarity extends even to the point of using the Same mnemonics for those assembly language instructions in the AP-1 which are the same or similar to instructions in the System/360.

The CPU is organized around eight 32-bit general registers, three 32-bit working registers, and a 32-bit carry-look-ahead adder. The fight general registers can be used as accumulators and index registers. Four of the general registers can also be used as base registers for addressing of up to 65,536 halfwords of memory. Instructions can be either 32 bits or 16 bits long and can operate on data that is either 32 bits or 16 bits long. The Memory contains In excess of a half a million bits of storage. It is organized as 16,384 full words (32 bits) and is addressable down to the half word (16 hits), The memory uses 1 microsecond cycle time, destructive read-out, random access, 7/13 mil ferrite cores organized into a 2 1/2 D array.

[lots more highly technical stuff snipped]

In summary, the F-15 Computational Subsystem is a Consolidated configuration of computers, in which the mission-oriented computations are performed in a single Central Computer and the sensor oriented computations arc performed in special processors in various sensor and display equipment. The Central Computer has adequate memory and execution time available for future growth. with further additional growth provided by the internal expansion capability of another 8K full words of memory. This reserve memory and speed along with the flexibility of the CC multiplex input/output system and the functional modularity of the sensor and display computations makes the F-15 Computational Subsystem easily adaptable to changes and expansions in F-mission requirements and ready to share a long and successful future with the F-15 aircraft.

AlAA Paper 1975-590
F-15 COMPUTATIONAL SUBSYSTEMS
V. McTigue
Subsystem Manager
F-15 Central Computer
McDonnell Aircraft Company


When IBM began its System/4 Pi development program early in 1965, the following guidelines were established:

• Only proven technologies and proven manufacturing techniques would be considered.

• Maximum commonality with IBM's commercial technology would be maintained to insure that the resources of the entire IBM Corporation would be available.

• An off-the-shelf production capability would be developed so that reliable systems could be produced in large quantities with minimum lead time.

• The design of each computer would be general-purpose, so that each computer model could address a wide range of military and space applications.

Adhering to those guidelines, a computer engineering team designed and developed a family of computers that consists of three basic models:

• Model TC (Tactical Computer) — A briefcase-size computer for applications such as missile guidance, helicopters, satellites and submarines

• Model CP (Customized Processor) — An intermediate -range processor for applications such as aircraft navigation, weapons delivery, radar correlation and mobile battlefield systems.

• Model EP (Extended Performance) - A large-scale data processor for applications requiring real-time processing of large volumes of data, such as manned spacecraft, airborne warning and control systems and command and control systems.

In 1966, System/4 Pi computers were selected for four major military programs with a current contract value to IBM of more than $50 million. Deliveries began in March 1967.

Typical computer configurations are shown in the illustration at the beginning of this section. The characteristics of each configuration are given in Table 1-1.
 
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F-15 VHSIC Central Computer (VCC)

The F-15 central computer controls pilot displays, weapon launch systems, and the aircraft g-load warning system. The VHSIC central computer will have improved memory/throughput capabilities and a greater mean time between failures. The operational software will be programmed in Ada in order to improve maintainability. An IBM VHSIC1750A processor forms the basis for this program. IBM is a subcontractor of McDonnell Douglas in this effort for the Air Force. The program began in September 1988. The first limited production unit is planned for 1990. The operational software is planned for early 1992.
 
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